Implementação de mecanismos de transição e coexistência dos protocolos IPV4-IPV6 nos centros de computação de alto desempenho suportados pelas redes acadêmicas

Autores

  • Carlos Andrés Martínez Alayón Universidad Distrital Francisco José de Caldas image/svg+xml
  • Roberto Ferro Escobar Universidad Distrital Francisco José de Caldas image/svg+xml
  • Víctor José Arrieta Zambrano Universidad Distrital Francisco José de Caldas image/svg+xml

DOI:

https://doi.org/10.18046/syt.v13i34.2094

Palavras-chave:

Transição IPV6, Pilha Dupla, túneis, ISATAP, 6to4, Teredo, SIIT.

Resumo

Este documento tem como objetivo contextualizar o leitor sobre alguns dos mecanismos que existem para a transição do IPv4 para o IPv6 e evidenciar alguns aspectos que devem ser considerados na avaliação e implementação de qualquer um deles, especificamente nos centros de computação de alto desempenho e redes acadêmicas para apoiar projetos de pesquisa.  Ainda se pretende mostrar a implementação e o suporte de IPv6 em plataformas tecnológicas e-learning.

Biografia do Autor

  • Carlos Andrés Martínez Alayón, Universidad Distrital Francisco José de Caldas

    Electronic Engineer, Specialist in Network Security. Candidate to Master of Science in Computer Science and Communications. Professor in Telematics, Informatics, and Networks in the Universidad Escuela Colombiana de Carreras Industriales [ECCI] and in the Universidad Distrital Francisco José de Caldas. Coordinator of the Advanced Technology Research Network in the Universidad Distrital [RITA-UD]. Scientific vice-director of the Laboratory of Research and Development in Electronics and Networks [LIDER], also at the Universidad Distrital.

  • Roberto Ferro Escobar, Universidad Distrital Francisco José de Caldas

    Electronic Engineer, Master of Science in Telematics, Informatics, and Networks from the Universidad Distrital Francisco José de Caldas. PhD in Engineering Informatics, Information Society, and Knowledge Management from the Universidad Pontificia de Salamanca. He is currently director of PhD in Engineering program, Dean of Engineering Faculty at the Universidad Distrital Francisco José de Caldas, and associate professor. Director of the Advanced Technology Research Network in the Universidad Distrital [RITA-UD] and scientific director of the Laboratory of Research and Development in Electronics and Networks [LIDER].

  • Víctor José Arrieta Zambrano, Universidad Distrital Francisco José de Caldas

    Electronic Engineer from the Universidad Distrital Francisco José de Caldas. Research assistant at the Laboratory of Research and Development in Electronics and Networks [LIDER]. He has worked in projects related with addressing and routing in IPv4 and IPv6. Network and Support technician at the Advanced Technology Research Network in the Universidad Distrital [RITA-UD].

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Publicado

2015-09-30

Edição

v. 13 n. 34 (2015)

Seção

Original Research

Licença

Esta publicação está licenciada sob os termos da licença CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/deed.pt_BR).